Research Catalog
Layout minimization of CMOS cells
- Title
- Layout minimization of CMOS cells / by Robert L. Maziasz and John P. Hayes.
- Author
- Maziasz, Robert L., 1952-
- Publication
- Boston : Kluwer Academic Publishers, c1992.
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| Status | Format | Access | Call Number | Item Location |
|---|---|---|---|---|
| Text | Request in advance | JSE 92-592 | Offsite |
Details
- Additional Authors
- Hayes, John P. (John Patrick), 1944-
- Description
- xii, 169 p. : ill.; 25 cm.
- Series Statement
- The Kluwer international series in engineering and computer science ; SECS 160
- Subject
- Bibliography (note)
- Includes bibliographical references (p. 157-165) and index.
- Call Number
- JSE 92-592
- ISBN
- 0792391829 (alk. paper)
- LCCN
- 91034031
- OCLC
- 24429749
- NYPG92-B28910
- Author
- Maziasz, Robert L., 1952-
- Title
- Layout minimization of CMOS cells / by Robert L. Maziasz and John P. Hayes.
- Imprint
- Boston : Kluwer Academic Publishers, c1992.
- Series
- The Kluwer international series in engineering and computer science ; SECS 160
- Bibliography
- Includes bibliographical references (p. 157-165) and index.
- Added Author
- Hayes, John P. (John Patrick), 1944-
- Research Call Number
- JSE 92-592