Research Catalog

Title

Euro-DAC '96, European Design Automation Conference with EURO-VHDL '96 and Exhibition : proceedings, Geneva, Switzerland, September 16-20, 1996 / sponsored by Gesellschaft für Informatik e.V. ... [et al.].

Author

European Design Automation Conference (1996 : Geneva, Switzerland)

Publication

Los Alamitos, Calif. : IEEE Computer Society Press, c1996.

Items in the Library & Off-site

Details

Additional Authors

Gesellschaft für Informatik.

Description

xxiii, 579 p. : ill.; 28 cm.

Subjects

• Electronic digital computers > Circuits > Design > Congresses
• VHDL (Computer hardware description language) > Congresses
• Electronic circuit design > Data processing > Congresses
• Computer-aided design > Congresses

Note

• "IEEE order plan catalog number 96CB36000"--T.p. verso.
• "IEEE Computer Society Press order number PR07573"--T.p. verso.
• "ACM order number 478962"--T.p. verso.

Bibliography (note)

• Includes bibliographical references and index.

Contents

Session D-01: Analog and mixed mode simulation -- Session D-02: Low power synthesis -- Session D-03: Design experience -- Session D-04: Timing modeling -- Session D-05: Design flow and design management -- Session D-06: (Panel) What's hot in low power design? -- Session D-07: Partitioning -- Session D-08: Logic and FSM synthesis -- Session D-09: BDD optimization techniques -- Session D-10: Codesign methodology and cospecification -- Session D-11: System level design and synthesis -- Session D-12: New aspects on testing -- Session D-13: Codesign methodology and cosimulation -- Session D-14: (Joint Panel EURO-DAC and EURO-VHDL) Which formal verification technique is more applicable in industry today: equivalence checking or property checking? -- Session D-15: Key technologies and CAD of microsystems -- Session D-16: Asynchronous synthesis and storage optimization -- Session D-17: Modelling, simulation of microsystems and multi layer routing in PCBs -- Session D-18: Timing issues in synthesis -- Session D-19: Physical design for deep submicron -- Session D-20: Architectural synthesis techniques -- Session D-21: (Panel) When do EDA tools hit the submicron wall? -- Session D-22: CAD for analog circuit -- Session V-01: Analysis tools -- Session V-02: Beyond VHDL -- Session V-03: (Panel) What advantages can we expect from object-oriented extensions to VHDL? -- Session V-04: Fault modeling and design for testability -- Session V-05: Formal methods -- Session V-06: Modeling methodologies -- Session V-07: Synthesis -- Session V-08: System level design -- Session V-09: VHDL and mixed signal design -- Session V-10: (Panel) The open forum model.

Call Number

JSF 97-23

ISBN

• 081867573X (casebound)
• 0818675756 (microfiche)

LCCN

96075523

OCLC

35706739

Conference

European Design Automation Conference (1996 : Geneva, Switzerland)

Title

Euro-DAC '96, European Design Automation Conference with EURO-VHDL '96 and Exhibition : proceedings, Geneva, Switzerland, September 16-20, 1996 / sponsored by Gesellschaft für Informatik e.V. ... [et al.].

Imprint

Los Alamitos, Calif. : IEEE Computer Society Press, c1996.

Bibliography

Includes bibliographical references and index.

Added Author

Gesellschaft für Informatik.

Research Call Number

JSF 97-23