Research Catalog

The cache coherence problem in shared-memory multiprocessors : software solutions

Title
The cache coherence problem in shared-memory multiprocessors : software solutions / Igor Tartalja, Veljko Milutinović.
Author
Tartalja, Igor.
Publication
Los Alamitos, Calif. : IEEE Computer Society Press, [1996], ©1996.

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StatusFormatAccessCall NumberItem Location
TextRequest in advance QA76.9.M45 T37 1996Off-site

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Details

Additional Authors
Milutinović, Veljko.
Description
x, 348 pages : illustrations; 28 cm
Summary
  • Almost all software solutions are developed through academic research and implemented only in prototype machines, thus leaving the field of software techniques for maintaining the cache coherence widely open for new research and development. This book is a collection of all representative approaches to software coherence maintenance and includes a number of related studies in the performance evaluation field.
  • The book illustrates state-of-the-art software solutions for cache coherence maintenance in shared-memory multiprocessors. It begins with a brief overview of the cache coherence problem and introduces software solutions to the problem. The text defines and details static and dynamic software schemes, techniques for modeling performance evaluation mechanisms, and performance evaluation studies.
  • The book is intended for the experienced reader in computer engineering but possibly a novice in the topic of cache coherence. It also provides an in-depth understanding of the problem as well as a comprehensive overview for multicomputer designers, computer architects, and compiler writers. In addition, it is a software coherence reference handbook for advanced undergraduate and typical graduate students in multiprocessing and multiprogramming areas.
Subject
  • Memory management (Computer science)
  • Multiprocessors
  • Cache memory
  • Systems software
Bibliography (note)
  • Includes bibliographical references.
Contents
  • How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs / L. Lamport -- Synchronization, Coherence, and Event Ordering in Multiprocessors / M. Dubois, C. Scheurich and F. A. Briggs -- Cache Coherence in Large-Scale Shared-Memory Multiprocessors: Issues and Comparisons / D. Lilja -- Software Cache Consistency in Shared-Memory Multiprocessors: A Survey of Approaches and Performance Evaluation Studies / I. Tartalja and V. Milutinovic -- Compiler-Directed Cache Management in Multiprocessors / H. Cheong and A. V. Veidenbaum -- RP3 Processor-Memory Element / W. C. Brantley, K. P. McAuliffe and J. Weiss -- A Compiler-Assisted Cache Coherence Solution for Multiprocessors / A. V. Veidenbaum -- A Cache Coherence Scheme With Fast Selective Invalidation / H. Cheong and A. V. Veidenbaum -- Automatic Management of Programmable Caches / R. Cytron, S. Karlovsky and K. P. McAuliffe -- A Version Control Approach to Cache Coherence / H. Cheong and A. V. Veidenbaum --
  • Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps / S. L. Min and J.-L. Baer -- A Generational Algorithm to Multiprocessor Cache Coherence / T. C. Chiueh -- Cache Coherence Using Local Knowledge / E. Darnell and K. Kennedy -- Software-Controlled Caches in the VMP Multiprocessor / D. R. Cheriton, G. A. Slavenburg and P. D. Boyle -- CPU Cache Consistency with Software Support and Using "One Time Identifiers" / A. J. Smith -- An Approach to Dynamic Software Cache Consistency Maintenance Based on Conditional Invalidation / I. Tartalja and V. Milutinovic -- Adaptive Software Cache Management for Distributed Shared Memory Architectures / J. K. Bennett, J. B. Carter and W. Zwaenepoel -- Analysis of Multiprocessors with Private Cache Memories / J. H. Patel -- Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories / F. A. Briggs and M. Dubois --
  • On the Validity of Trace-Driven Simulation for Multiprocessors / E. J. Koldinger, S. J. Eggers and H. M. Levy -- Multiprocessor Cache Simulation Using Hardware Collected Address Traces / A. W. Wilson -- Cache Invalidation Patterns in Shared-Memory Multiprocessors / A. Gupta and W.-D. Weber -- Benchmark Characterization for Experimental System Evaluation / T. M. Conte and W. W. Hwu -- A Model of Workloads and Its Use in Miss-Rate Prediction for Fully Associative Caches / J. P. Singh, H. S. Stone and D. F. Thiebaut -- A Performance Comparison of Directory-Based and Timestamp-Based Cache Coherence Schemes / S. L. Min and J.-L. Baer -- Evaluating the Performance of Software Cache Coherence / S. Owicki and A. Agarwal -- Comparison of Hardware and Software Cache Coherence Schemes / S. V. Adve, V. S. Adve, M. D. Hill and M. K. Vernon.
ISBN
0818670967
LCCN
95010025
OCLC
ocm32166645
Owning Institutions
Columbia University Libraries