Research Catalog
EURO-DAC '95 : European Design Automation Conference with EURO-VHDL : Brighton, Great Britain, September 18-22, 1995
- Title
- EURO-DAC '95 : European Design Automation Conference with EURO-VHDL : Brighton, Great Britain, September 18-22, 1995 / sponsored by Gesellschaft für Informatik e. V. [and others].
- Author
- European Design Automation Conference (5th : 1995 : Brighton, England)
- Publication
- Los Alamitos, Calif. : IEEE Computer Society Press, [1995], ©1995.
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Status | Format | Access | Call Number | Item Location |
---|---|---|---|---|
Text | Request in advance | TA174 .E88 1995g | Off-site |
Holdings
Details
- Additional Authors
- Description
- xxviii, 608 pages : illustrations; 29 cm
- Alternative Title
- European Design Automation Conference with EURO-VHDL
- Proceedings
- Proceedings, EURO-DAC '95
- 1995 European Design Automation Conference
- Subject
- Note
- "IEEE Computer Society Technical Committee for Design Automation.
- "Association for Computing Machinery."
- "IEEE catalog number 95CB35850"--T.p. verso.
- Bibliography (note)
- Includes bibliographical references and author index.
- Contents
- Session D-01: System level synthesis -- Session D-02: Information modeling -- Session D-03: Timing issues in synthesis -- Session D-04: Placement and routing -- Session D-05: Different aspects of testability improvements -- Session D-06: Architectural synthesis -- Session D-07: Partioning and floorplanning -- Session D-08: Simulation and partitioning of hardware/software systems -- Session D-09: Fault modeling and delay testing -- Session D-11: Analog & timing modelling -- Session D-12: ATPG and speed-up techniques -- Session D-13: Simulation and debugging of system descriptions -- Session D-14: Logic synthesis and optimization -- Session D-15: Framework architectures -- Session D-16: Hardware/software system design -- Session D-17: EMC and thermal effects -- Session D-18: New ideas in synthesis -- Session V-01: Simulation -- Session V-02: Formal methods -- Session V-03: Language development -- Session V-04: Behavioral synthesis from VHDL -- Session V-05: Design techniques -- Session V-07: System level design -- Session V-08: Modeling -- Session V-09: Verification and validation -- User plenary session.
- ISBN
- 0780330803
- LCCN
- 95079052
- OCLC
- 34284996
- ocm34284996
- Owning Institutions
- Columbia University Libraries