Research Catalog

Proceedings, second International Symposium on Advanced Research in Asynchronous Circuits and Systems : March 18-21, 1996, Aizu-Wakamatsu, Fukushima, Japan

Title
Proceedings, second International Symposium on Advanced Research in Asynchronous Circuits and Systems : March 18-21, 1996, Aizu-Wakamatsu, Fukushima, Japan / sponsored by IEEE Computer Society Technical Committee on VLSI, IEICE Technical Group on VLSI Design, Telecommunications Advancement Foundation in cooperation with IFIP WG 10.5, University of Aizu.
Author
International Symposium on Advanced Research in Asynchronous Circuits and Systems (1996 : Aizu-Wakamatsu, Fukushima, Japan)
Publication
Los Alamitos, California : IEEE Computer Society Press, [1996], ©1996.

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TextRequest in advance TK7868.A79 I58 1996gOff-site

Holdings

Details

Additional Authors
  • IEEE Computer Society. Technical Committee on VLSI.
  • Telecommunications Advancement Foundation.
  • IFIP WG 10.5.
  • Advanced Research in Asynchronous Circuits and Systems.
  • IEICE Technical Group on VLSI Design.
Description
x, 263 pages : illustrations; 29 cm
Alternative Title
  • Async'96
  • Second international symposium on advanced research in asynchronous circuits and systems
Subjects
Note
  • "IEEE Computer Society Press order number 6210-02"--T.p. verso.
  • "IEEE catalog number 94TH06627"--T.p. verso.
  • "Async'96"-- on cover.
  • "Second International Symposium on Advanced Research in Asynchronous Circuits and systems"--Cover title.
Bibliography (note)
  • Includes bibliographical references and index.
Contents
A System for Asynchronous High-Speed Chip to Chip Communication / P. T. Roine -- Dynamic Logic in Four-Phase Micropipelines / S. B. Furber and J. Liu -- High-Performance Asynchronous Pipeline Circuits / K. Y. Yun, P. A. Beerel and J. Arceo -- An Efficient Algorithm for Deriving Logic Functions of Asynchronous Circuits / T. Miyamoto and S. Kumagai -- Complete State Encoding Based on the Theory of Regions / J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno and A. Yakovlev -- General Condition for the Decomposition of State Holding Elements / S. M. Burns -- Fred: An Architecture for a Self-Timed Decoupled Computer / W. F. Richardson and E. Brunvand -- Counterflow Pipeline Based Dynamic Instruction Scheduling / T. Werner and V. Akella -- Static Scheduling of Instructions on Micronet-Based Asynchronous Processors / D. K. Arvind and V. E. F. Rebello -- Dynamic Hazards and Speed Independent Delay Model / N. Tabrizi, M. J. Liebelt and K. Eshraghian -- Some Limitations to Speed-Independence in Asynchronous Circuits / M. E. Bush and M. B. Josephs -- On the Correctness of the Sproull Conterflow Pipeline Processor / P. G. Lucassen and J. T. Udding -- Single-Track Handshake Signaling with Application to Micropipelines and Handshake Circuits / K. van Berkel and A. Bink -- Pulse-Driven Dual-Rail Logic Gate Family Based on Rapid Single-Flux-Quantum (RSFQ) Devices for Asynchronous Circuits / M. Maezawa, I. Kurosawa, Y. Kameda and T. Nanya -- Activity-Monitoring Completion-Detection (AMCD): A New Single Rail Approach to Achieve Self-Timing / E. Grass, R. C. S. Morling and I. Kale -- Using Partial Orders for Trace Theoretic Verification of Asynchronous Circuits / T. Yoneda and T. Yoshikawa -- Statechart Methodology for the Design, Validation, and Synthesis of Large Scale Asynchronous Systems / R. Kol, R. Ginosar and G. Samuel -- Characterizing Metastability / C. Foley -- The Energy and Entropy of VLSI Computations / J. A. Tierno, R. Manohar and A. J. Martin -- A Low-Power Asynchronous Data Path for a FIR Filter Bank / L. S. Nielsen and J. Sparso -- The AMULET2e Cache System / J. D. Garside, S. Temple and R. Mehra -- Quasi-Delay-Insensitive Circuits are Turing Complete / R. Manohar and A. J. Martin -- Combining Process Algebras and Petri Nets for the Specification and Synthesis of Asynchronous Circuits / M. A. Pena and J. Cortadella -- Control Resynthesis for Control-Dominated Asynchronous Designs / T. Kolks, S. Vercauteren and B. Lin -- Optimizing Average-Case Delay in Technology Mapping of Burst-Mode Circuits / P. A. Beerel, K. Y. Yun and W. C. Chou -- Results on Amulet2 / S. B. Furber.
ISBN
  • 0818672986 (case)
  • 0818673001 (microfiche)
OCLC
  • 34521072
  • ocm34521072
Owning Institutions
Columbia University Libraries