Research Catalog

Computer-aided design techniques for low power sequential logic circuits

Title
Computer-aided design techniques for low power sequential logic circuits / by José Monteiro and Srinivas Devadas.
Author
Monteiro, José, 1966-
Publication
Boston : Kluwer Academic, [1997], ©1997.

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Details

Additional Authors
Devadas, Srinivas.
Description
xiii, 181 pages : illustrations; 25 cm.
Series Statement
The Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing
Uniform Title
  • Kluwer international series in engineering and computer science ; SECS 387.
  • Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing.
Subject
  • Logic circuits > Data processing
  • Logic design > Data processing
  • Low voltage integrated circuits > Data processing
  • Computer-aided design
Bibliography (note)
  • Includes bibliographical references and index.
Contents
1. Introduction -- 2. Power Estimation -- 3. A Power Estimation Method for Combinational Circuits -- 4. Power Estimation for Sequential Circuits -- 5. Optimization Techniques for Low Power Circuits -- 6. Retiming for Low Power -- 7. Precomputation -- 8. High-Level Power Estimation and Optimization -- 9. Conclusion.
ISBN
0792398297 (acid-free paper)
LCCN
96045081
OCLC
  • 35688167
  • ocm35688167
Owning Institutions
Columbia University Libraries