Research Catalog

Title

Proceedings : 6th IEEE International On-Line Testing Workshop : July 3-5, 2000, Palma De Mallorca, Spain / sponsored by IEEE Computer Society Test Technology Technical Council in cooperation with University of Illes Balears.

Author

IEEE International On-Line Testing Workshop (6th : 2000 : Palma de Mallorca, Spain)

Publication

Los Alamitos, Calif. : IEEE Computer Society, [2000], ©2000.

Items in the Library & Off-site

Holdings

Details

Additional Authors

IEEE Computer Society. Technical Council on Test Technology.

Description

x, 220 pages : illustrations; 28 cm

Alternative Title

• On-Line Testing Workshop
• Online Testing Workshop
• IEEE International On-Line Testing Workshop

Subjects

• Error-correcting codes (Information theory) > Congresses
• Electronic circuits > Testing > Congresses
• Electronic circuit design > Congresses
• Online data processing > Congresses

Note

• "IEEE order plan catalog number PR00646"--T.p. verso.

Bibliography (note)

• Includes bibliographical references and author index.

Contents

• Dependability Issues in the WWW / Jacob Abraham -- Micro-Checkpointing: Checkpointing for Multithreaded Applications / K. Whisnant, Z. Kalbarczyk and R. Iyer -- A COTS Wrapping Toolkit for Fault Tolerant Applications under Windows NT / A. Benso, S. Chiusano and P. Prinetto -- Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC - and CISC-Based Architectures / M. Rebaudengo, M. Sonza Reorda and M. Violame / [et al.] -- Relation between Fault Tolerance and Reconfiguration in Cellular Systems / L. Sekanina and V. Drabek -- Improving On-Line BIST-Based Diagnosis for Roving STARs / M. Abramovici, C. Stroud and B. Skaggs / [et al.] -- Self-Testing of FPGA Delay Faults in the System Environment / A. Krasniewski -- A Crosstalk Sensor Implementation for Measuring Interferences in Digital CMOS VLSI Circuits / J. Sainz, M. Roca and R. Munoz / [et al.] --
• An Overview of the Applications of a Pulsed Laser System for SEU Testing / V. Pouget, P. Fouillat and D. Lewis / [et al.] -- New Techniques for Accelerating Fault Injection in VHDL Descriptions / B. Parrotta, M. Rebaudengo and M. Sonza Reorda / [et al.] -- Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL / F. Vargas, A. Amory and R. Velazco -- A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System / D. Gil, J. Gracia and J. Baraza / [et al.] -- Transient Bitflip Injection in Microprocessor Embedded Applications / R. Velazco and S. Rezgui -- On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor / B. Alorda, I. de Paul and J. Segura / [et al.] -- I-V Fast I[subscript DDQ] Current Sensor for On-Line Mixed-Signal/Analog Test / M. Margala, S. Dragic and A. Elabasiry / [et al.] --
• A Compact Built-In Current Sensor for I[subscript DDQ] Testing / Y. Tsiatouhas, Th. Haniotakis and D. Nikolas -- An Improved CMOS BICS for On-Line Testing / Y. Maidon, Y. Deval and J. Begueret -- Concurrent Scan Monitoring and Multi-Pattern Search / J. dos Santos -- Analytical Redundancy Based Approach for Concurrent Fault Detection in Linear Digital Systems / A. Abdelhay and E. Simeu -- Decomposition Approach to Designing FPGA-Based Self-Checking Control Units / M. Karpovsky, I. Levin and V. Sinelnikov -- Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-At and Bridging Faults / P. Girard, C. Landrault and S. Pravossoudovitch / [et al.] -- On Using Deterministic Test Sets in BIST / O. Novak and J. Nosek -- Power Reduction in Test-Per-Scan BIST / X. Zhang and K. Roy -- New Self-Checking Circuits by Use of Berger-Codes / A. Morozov, V. Saposhnikov and Vl. Saposhnikov / [et al.] --
• A New Method for Concurrent Checking by Use of a 1-out-of-4 Code / M. Gossel, Vl. Saposhnikov and A. Dmitiriev / [et al.] -- Self-Checking FSM Design with Observing Only FSM Outputs / A. Matrosova and S. Ostanin -- Faster Time-to-Market, Lower Cost of Development and Test for Standard Analog IC / P. Migliavacca -- Theoretical Performance Bounds of a Probability of Bit Error Estimator Used in Digital Links Employing Binary Block Codes / K. Jagath-Kumara -- A Stamping Technique to Increase the Error Correction Capacity of the (127,k,d) RS Code / T. Vallino, A. Dandache and F. Monteiro / [et al.] -- Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes / D. Das, N. Touba and M. Seuring / [et al.] -- A Very Flexible DSP-Based Controller for On-Line Test and Control of Industrial Processes / M. Nillesen, A. Del Pizzo and M. Pasquariello / [et al.] -- On Realization of Fault-Tolcrant Fuzzy Controllers / N. Kamiura, M. Tomita and T. Isokawa / [et al.] --
• ISIS: A Fail-Safe Interface Realized in Smart Power Technology / M. Nicolaidis, N. Zaidan and T. Calin / [et al.] -- High-Level Synthesis Methodology for On-Line Testability Optimization / M. Naal and E. Simeu -- Improving Fault Coverage in System Tests / J. Sosnowski -- A Family of Self-Repair SRAM Cores / A. Benso, S. Chiusano and G. Di Natale / [et al.].

ISBN

0769506461

LCCN

00103667

OCLC

• ocm44624701
• SCSB-3884703

Owning Institutions

Columbia University Libraries