Research Catalog

Title

6th Australasian Computer Systems Architecture Conference : ACSAC 2001 : proceedings : 29-30 January, 2001, Gold Coast, Queensland, Australia / edited by Gernot Heiser ; sponsored by Bond University, Griffith University, Gold Coast.

Author

Australasian Computer Systems Architecture Conference (6th : 2001 : Gold Coast, Qld.)

Publication

Los Alamitos, Calif. : IEEE Computer Society, [2001], ©2001.

Items in the Library & Off-site

Holdings

Details

Additional Authors

• Heiser, Gernot, 1957-
• Bond University (Gold Coast, Qld.)
• Griffith University.

Description

viii, 147 pages : illustrations; 24 cm.

Series Statement

Australian computer science communications ; vol. 23, no. 4

Uniform Title

Australian computer science communications ; v. 23, no. 4.

Alternative Title

• Computer systems architecture
• Proceedings of the 6th Australasian Computer Systems Architecture Conference ACSAC 2001
• ACSAC 2001

Subject

Computer architecture > Congresses

Note

• Previous conference entitled: Australasian Computer Architecture Conference.
• "IEEE Computer Society Order Number PR00954"--T.p. verso.

Bibliography (note)

• Includes bibliographical references and index.

Contents

• The SawMill Framework for Virtual Memory Diversity / M. Aron, J. Liedtke and K. Elphinstone / [et al.] -- Adaptive Interfacing with Reconfigurable Computers / N. Bergmann and A. Dawood -- Error Detection for Adaptive Computing Architectures in Spacecraft Applications / D. Brodrick, A. Dawood and N. Bergmann / [et al.] -- Components + Security = OS Extensibility / A. Edwards and G. Heiser -- Application Domains for Fixed-Length Block Structured Architectures / L. Eeckhout, T. Aa and B. Goeman / [et al.] -- A Simulator for High Speed Digital Communications / E. Fardin, P. Munro and J. Scagliotta / [et al.] -- Stacking Them up: A Comparison of Virtual Machines / K. Gough -- DSTRIDE: Data-Cache Miss-Address-Based Stride Prefetching Scheme for Multimedia Processors / G. Hariprakash, R. Achutharaman and A. Omondi -- Two Cache Lines Prediction for a Wide-Issue Micro-Architecture / S.-L. Hwang and F. Lai --
• Implementing an Efficient Vector Instruction Set in a Chip Multi-Processor Using Micro-Threaded Pipelines / C. Jesshope -- High-Performance Extendable Instruction Set Computing / H. Lee, P. Beckett and B. Appelbe -- Fault-Tolerant Routing on Complete Josephus Cubes / P. Loh, H. Schroder and W. Hsu -- Password-Capabilities: Their Evolution from the Password Capability System into Walnut and beyond / R. Pose -- Retargetable Cache Simulation Using High Level Processor Models / R. Ravindran and R. Moona -- Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading / K. Watanabe, W. Chu and Y. Li -- The First Real Operating System for Reconfigurable Computers / G. Wigley and D. Kearney -- Performance Evaluation of a Partial Retraining Scheme for Defective Multi-Layer Neural Networks / K. Yamamori, T. Abe and S. Horiguchi.

ISBN

0769509541

OCLC

• 50192512
• ocm50192512
• SCSB-4137157

Owning Institutions

Columbia University Libraries