Research Catalog
Power-aware computer systems : first International Workshop, PACS 2000, Cambridge, MA, USA, November 12, 2000, revised papers
- Title
- Power-aware computer systems : first International Workshop, PACS 2000, Cambridge, MA, USA, November 12, 2000, revised papers / Babak Falsafi, T.N. Vijaykumar, (Eds.)
- Author
- International Workshop PACS (1st : 2000 : Cambridge, Mass.)
- Publication
- New York : Springer, 2001.
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Status | Format | Access | Call Number | Item Location |
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Text | Request in advance | TK7895.P68 I58 2000 | Off-site | |
Not available - Please for assistance. | Text | Use in library | Off-site |
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Details
- Additional Authors
- Description
- x, 151 pages : illustrations; 24 cm.
- Series Statement
- Lecture notes in computer science ; 2008
- Uniform Title
- Lecture notes in computer science ; 2008.
- Alternative Title
- PACS 2000
- Subjects
- Additional Formats (note)
- Also available via the World Wide Web.
- Contents
- System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors / F. Gruian -- Ramp Up/Down Functional Unit to Reduce Step Power / Z. Tang, N. Chang and S. Lin / [et al.] -- An Adaptive Issue Queue for Reduced Power at High Performance / A. Buyuktosunoglu, S. Schuster and D. Brooks / [et al.] -- Dynamic Memory Oriented Transformation in the MPEG4 IM1-Player on a Low Power Platform / P. Marchal, C. Wong and A. Prayati / [et al.] -- Exploiting Content Variation and Perception in Power-Aware 3D Graphics Rendering / J. Euh and W. Burleson -- Compiler-Directed Dynamic Frequency and Voltage Scheduling / C.-H. Hsu, U. Kremer and M. Hsiao -- Cache-Line Decay: A Mechanism to Reduce Cache Leakage Power / S. Kaxiras, Z. Hu and G. Narlikar / [et al.] -- Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors / R. Maro, Y. Bai and R. I. Bahar -- TEM[superscript 2]P[superscript 2]EST: A Thermal Enabled Multi-model Power/Performance ESTimator / A. Dhodapkar, C. H. Lim and G. Cai / [et al.] -- Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor / D. Brooks, M. Martonosi and J.-D. Wellman / [et al.] -- A Comparison of Two Architectural Power Models / S. Ghiasi and D. Grunwald.
- ISBN
- 354042329X (pbk. : alk. paper)
- LCCN
- 2001042875
- OCLC
- ocm47238205
- SCSB-4157700
- Owning Institutions
- Columbia University Libraries