Research Catalog

Neural networks and systolic array design

Title
Neural networks and systolic array design / editors, David Zhang, Sankar K. Pal.
Publication
River Edge, N.J. : World Scientific, [2002], ©2002.

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TextRequest in advance QA76.87 .N4750 2002gOff-site

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Details

Additional Authors
  • Zhang, David, 1949-
  • Pal, Sankar K.
Description
xiv, 405 pages : illustrations; 24 cm.
Series Statement
Series in machine perception and artificial intelligence ; v. 49
Uniform Title
Series in machine perception and artificial intelligence ; v. 49.
Subjects
Bibliography (note)
  • Includes bibliographical references and index.
Contents
  • Ch. 1. Neural Networks and Systolic Arrays: Models and Integration / D. Zhang and S. K. Pal -- Ch. 2. Systolic Array Methodology for a Neural Model to Solve the Mixture Problem / R. M. Perez, P. Martinez, A. Plaza and P. L. Aguilar -- Ch. 3. Morphological Endmember Identification and Its Systolic Array Design / P. L. Aguilar, A. Plaza, P. Martinez and R. M. Perez -- Ch. 4. MANTRA I: A Systolic Array for Neural Computation / M. A. Viredaz and P. Ienne -- Ch. 5. Mixed-Signal Neuro-Fuzzy Processor Implementations: Sequential Architectures and Circuit-Level Description / J. Madrenas and E. Alarcon -- Ch. 6. CMAC Neural Networks and Systolic Implementation / B. D. Liu, Y. H. Kuo and J. S. Ker -- Ch. 7. Quadrant Interlocking Factorization on Systolic and Wavefront Array Processors / M. P. Bekakos, O. B. Efremides and D. J. Evans -- Ch. 8. Systolic S.O.M. Neural Network for Hyperspectral Image Classification / P. Martinez, P. L. Aguilar, R. M. Perez and A. Plaza --
  • Ch. 9. Optimizing and Learning Algorithm for Feedforward Neural Networks and Its Implementation by Systolic Array / P. B. Burgos -- Ch. 10. Parallel ANN Architecture for Fizzy Patterns / D. Zhang and S. K. Pal -- Ch. 11. Pipelined Systolic Arrays for Time-Delay Neural Networks / D. Zhang and S. K. Pal -- Ch. 12. An Integrated Intelligent Classification Engine (I[superscript 2]CE) for Biosignal Engineering / A. N. Kastania and M. P. Bekakos -- Ch. 13. Multiplierless Designs for Artificial Neural Networks / H. K. Kwan -- Ch. 14. A VLSI System for Intelligent Decision Making in Real-Time / N. Ranganathan and M. I. Patel -- Ch. 15. Reconfigurable Hardware Systolic Array for Real-Time Compartmental Modeling of Large-Scale Artificial Nervous Systems / M. Korkin -- Ch. 16. Implementing and Mapping ANNs on Reconfigurable Mesh Massively Parallel Architectures / W. N. Li and J. J. Jenq.
ISBN
9810248407
OCLC
  • ocm50701826
  • SCSB-4322420
Owning Institutions
Columbia University Libraries