Research Catalog

A parallel algorithm synthesis procedure for high-performance computer architectures / Ian N. Dunn and Gerard G.L. Meyer.

Title
A parallel algorithm synthesis procedure for high-performance computer architectures / Ian N. Dunn and Gerard G.L. Meyer.
Author
Dunn, Ian N.

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1 Item

StatusFormatAccessCall NumberItem Location
TextUse in library QA76.642 .D86 2003Off-site

Details

Additional Authors
Meyer, Gerard G. L.
Description
xi, 108 p. : ill.; 24 cm.
Series Statement
Series in computer science
Subjects
ISBN
0306477432
LCCN
2003044716
Owning Institutions
Columbia University Libraries