Research Catalog

Title

Proceedings : 4th International Workshop on Microprocessor Test and Verification, common challenges and solutions, MTV 2003, Hyatt Town Lake Hotel, Austin, Texas, May 29-30, 2003 / [edited by Magdy S. Abadir and Li-C. Wang] ; sponsored by IEEE Computer Society Test Technology Technical Council (TTTC).

Author

International Workshop on Microprocessor Test and Verification (4th : 2003 : Austin, Tex.)

Publication

Los Alamitos, Calif. : IEEE Computer Society, c2003.

Items in the Library & Off-site

Details

Additional Authors

• Abadir, M.
• Wang, Li-C., 1963-
• IEEE Computer Society. Technical Council on Test Technology

Description

xi, 125 p. : ill.; 28 cm.

Alternative Title

• Microprocessor test and verification
• Fourth International Workshop on Microprocessor Test and Verification

Subjects

• Integrated circuits > Verification > Congresses
• Integrated circuits > Testing > Congresses
• Systems on a chip > Testing > Congresses
• Microprocessors > Testing > Congresses

Bibliography (note)

• Includes bibliographical references and index.

Additional Formats (note)

• Also available via the World Wide Web.

Contents

TTTC : test technology technical council -- DeepTrans - a model-based approach to functional verification of address translation mechanisms / A. Adir, R. Emek, Y. Katz and A. Koyfman -- Modeling IP responses in testcase generation for systems-on-chip verification / M. Bose, M. Nodine, W. Jurasz, Jr., V. Zavadsky, A. Chodavadia and L. Nunes -- Definition of a systematic method for the generation of software test programs allowing the functional verification of system on chip (SoC) / F. Hunsinger, S. Francois and A. Jerraya -- Testing the path delay faults of ISCAS85 circuit c6288 / W. Qiu and D. Walker -- Comparison of verification methodologies for datapath testing / V. Iyer -- A methodology for validating manufacturing test vector suits for custom designed scan-based circuits / J. Bhadra, N. Krishnamurthy and M. Abadir -- Utilizing various ADL facets for instruction level CPU test / E. Safi, Z. Karimi, M. Abbaspour and Z. Navabi -- Automatic detection of logic bugs in hardware designs / A. Klaiber and S. Chau -- Extraction error analysis, diagnosis and correction in custom-made high-performance designs / Y.-S. Yang, J. Liu, P. Thadikaran and A. Veneris -- Fault diagnosis and logic debugging using Boolean satisfiability / A. Veneris -- Heuristic backtracking algorithms for SAT / A. Bhalla, I. Lynce, J. de Sousa and J. Marques-Silva -- Tuning the VSIDS decision heuristic for bounded model checking / O. Shacham and E. Zarpas -- A methodology for validation of microprocessors using equivalence checking / P. Mishra and N. Dutt -- A systemC-based framework for properties incompleteness evaluation / A. Fin, F. Fummi, M. Poncino and G. Pravadelli -- A robust and scalable technique for the constraints solving problem in high-level verification / M. Iyer -- Systematic abstractions of microprocessor RTL models to enhance simulation efficiency / D. Bhaduri, M. Chandra, H. Patel, S. Sharad and S. Suhaib -- Energy awareness through software optimisation as a performance estimate cast study of the MC68HC908GP32 microcontroller / J. Oliver, O. Mocanu and C. Ferrer -- A deterministic globally asynchronous locally synchronous microprocessor architecture / M. Heath and I. Harris.

ISBN

0769520456

OCLC

• ocm53816995
• SCSB-4838946

Owning Institutions

Columbia University Libraries