Research Catalog

ISLPED '04 : proceedings of the 2004 International Symposium on Low Power Electronics and Design : Newport Beach Marriott Hotel, Newport Beach, California, USA, August 9-11, 2004

Title
ISLPED '04 : proceedings of the 2004 International Symposium on Low Power Electronics and Design : Newport Beach Marriott Hotel, Newport Beach, California, USA, August 9-11, 2004 / sponsored by ACM SIGDA and IEEE Circuits and Systems Society ; with technical support from the IEEE Solid-State Circuits Society and the IEEE Electron Devices Society.
Author
International Symposium on Low Power Electronics and Design (2004 : Newport Beach, Calif.)
Publication
New York, N.Y. : Association for Computing Machinery, [2004], ©2004.

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Details

Additional Authors
  • ACM Special Interest Group on Design Automation.
  • IEEE Circuits and Systems Society.
  • IEEE Solid-State Circuits Society.
  • IEEE Electron Devices Society.
Description
xiii, 400 pages : illustrations; 28 cm
Alternative Title
  • Proceedings of the 2004 International Symposium on Low Power Electronics and Design
  • 2004 International Symposium on Low Power Electronics and Design
  • Low power electronics and design
Subject
Note
  • "ACM Order Number 477044"--T.p. verso.
  • "IEEE Catalog Number: 04TH8758"--T.p. verso.
Bibliography (note)
  • Includes bibliographical references and author index.
Additional Formats (note)
  • Also issued online.
Contents
  • Why hot chips are no longer "cool" / R. Bryant -- Leakage power reduction by dual-Vth designs under probabilistic analysis of Vth variation / M. Liu, W.-S. Wang and M. Orshansky -- Larger-than-Vdd forward body bias in sub-0.5V nanoscale CMOS / H. Ananthan, C. H. Kim and K. Roy -- Technology exploration for adaptive power and frequency scaling in 90nm CMOS / M. Meijer, F. Pessolano and J. Pineda de Gyvez -- Experimental measurement of a novel power gating structure with intermediate power saving mode / S. Kim, S. V. Kosonocky, D. R. Knebel and K. Stawiasz -- Improved clock-gating through transparent pipelining / H. M. Jacobson -- Microarchitectural techniques for power gating of execution units / Z. Hu, A. Buyuktosunoglu, V. Srinivasan, V. Zyuban, H. Jacobson and P. Bose -- SEPAS : a highly accurate energy-efficient branch predictor / A. Baniasadi and A. Moshovos -- Understanding the energy efficiency of simultaneous multithreading / Y. Li, D. Brooks, Z. Hu, K. Skadron and P. Bose -- Impact of technology scaling on energy aware execution cache-based microarchitectures / E. Talpes and D. Marculescu -- Single-V[subscript DD] and single-V[subscript T] super-drowsy techniques for low-leakage high-performance instruction caches / N. S. Kim, K. Flautner, D. Blaauw and T. Mudge -- Design and implementation of correlating caches / A. Mallik, M. C. Wildrick and G. Memik -- Dynamic power management for streaming data / N. Pettis, L. Cai and Y.-H. Lu -- Delayed line bus scheme : a low-power bus scheme or coupled on-chip buses / M. Ghoneima and Y. Ismail -- Delay optimal low-power circuit clustering for FPGAs with dual supply voltages / D. Chen and J. Cong -- Creating a power-aware structured ASIC / R. R. Taylor and H. Schmit -- Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems / R. Jejurikar and R. Gupta -- ESACW : an adaptive algorithm for transmission power reduction in wireless networks / H. Su, P. Qiu and Q. Qiu -- Any-time probabilistic switching model using Bayesian networks / S. S. Ramani and S. Bhanja -- Characterizing and modeling minimum energy operation for subthreshold circuits / B. H. Calboun and A. Chandrakasan -- Device optimization for ultra-low power digital sub-threshold operation / B. C. Paul, A. Raychowdhury and K. Roy -- Nanoscale CMOS circuit leakage power reduction by double-gate device / K. Kim, K. K. Das, R. V. Joshi and C.-T. Chuang -- 4T-decay sensors : a new class of small, fast, robust, and low-power, temperature/leakage sensors / S. Kaxiras and P. Xekalakis -- HotSpot cache : joint temporal and spatial locality exploitation for I-cache energy reduction / C.-L. Yang and C.-H. Lee -- Location cache : a low-power L2 cache system / R. Min, W.-B. Jone and Y. Hu -- A way-halting cache for low-energy high-performance systems / C. Zhang, J. Yang, W. Najjar and F. Vahid -- Soft error and energy consumption interactions : a data cache perspective / L. Li, V. Degalahal, N. Vijaykrishnan, M. Kandemir and M. J. Irwin -- Post-layout leakage power minimization based on distributed sleep transistor insertion / P. Babighian, L. Benini, A. Macii and E. Macii -- Total power optimization through simultaneously multiple-V[subscript DD] Multiple-V[subscript TH] assignment and device sizing with stack forcing / W. Hung, Y. Xie, N. Vijaykrishnan, M. Kandemir, M. J. Irwin and Y. Tsai -- Active mode leakage reduction using fine-grained forward body biasing strategy / V. Khandelwal and A. Srivastava -- A probabilistic framework to estimate full-chip subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations / S. Zhang, V. Wason and K. Banerjee -- Maximizing efficiency of solar-powered systems by load matching / D. Li and P. H. Chou -- Power utility maximization for multiple-supply systems by a load-matching switch / C. Park and P. H. Chou -- Dynamic voltage and frequency scaling based on workload decomposition / K. Choi, R. Soma and M. Pedram -- Architecting voltage islands in core-based system-on-a-chip designs / J. Hu, Y. Shin, N. Dhanwada and R. Marculescu -- Balanced energy optimization / J. Cornish -- Battery life challenges on future mobile notebook platforms / S. Thakkar -- Approaches to run-time and standby mode leakage reducation in global buses / R. Rao, K. Agarwal, D. Sylvester, R. Brown, K. Nowka and S. Nassif -- Spatial encoding circuit techniques for peak power reduction of on-chip high-performance buses / H. Kaul, D. Sylvester, M. Anders and R. Krishnamurthy -- A new algorithm for improved VDD assignment in low power dual VDD systems / S. H. Kulkarni, A. N. Srivastava and D. Sylvester -- Limited intra-word transition codes : an energy-efficient bus encoding for LCD display interfaces / S. Salerno, A. Bocca, E. Macii and M. Poncino -- Microarchitectural power modeling techniques for deep sub-micron microprocessors / N. S. Kim, T. Kgil, V. Bertacco, T. Austin and T. Mudge -- Power-optimal pipelining in deep submicron technology / S. Heo and K. Asanovic -- Application-level prediction of battery dissipation / C. Krintz, Y. Wen and R. Wolski -- Minimizing power consumption and complexity in a programmable transmit filter bank for OFDM / A. Mehrnia and B. Daneshrad -- On optimality of adiabatic switching in MOS energy-recovery circuit / B. Wang and P. Mazumder -- Constant-load energy recovery memory for efficient high-speed operation / J. Kim and M. C. Papaefthymiou -- A comparative study on MOS VCOs for low voltage high performance operation / J. H. C. Zhan, J. S. Duster and K. T. Kornegay -- A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies / B. Chatterjee, M. Sachdev and R. Krishnamurthy -- A low-power rail-to-rail 6-bit flash ADC based on a novel complementary average-value approach / H.-C. Tseng, H.-H. Ou, C.-S. Lin and B.-D. Liu -- Integrated adaptive DC/DC conversion with adaptive pulse-train technique for low-ripple fast-response regulation / C. Zhang, D. Ma and A. Srivastava -- Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation / G. Schrom, P. Hazucha, J.-H. Hahn, V. Kursun, D. Gardner, S. Narendra, T. Karnik and V. De -- 2.45 GHz power and data transmission for a low-power autonomous sensors platform / S. Gregori, Y. Li, H. Li, J. Liu and F. Maloberti -- Managing standby and active mode leakage power in deep sub-micron design / L. T. Clark, R. Patel and T. S. Beatty -- Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps / M. Verhelst, W. Vereecken, M. Steyaert and W. Dehaene -- Low-power asynchronous Viterbi decoder for wireless applications / M. Kawokgy and C. A. T. Salama -- A CMOS even harmonic mixer with current reuse for low power applications / M.-F. Huang, S.-Y. Lee and C. J. Kuo -- A novel continuous-time common-mode feedback for low-voltage switched-OPAMP / M. Ali-Bakhshian and K. Sadeghi -- The design of a low power asynchronous multiplier / Y. Liu and S. Furber -- Low-power fixed-width array multipliers / J.-S. Wang, C.-N. Kuo and T.-H. Yang -- Low-power carry-select adder using adaptive supply voltage based on input vector patterns / H. Suzuki, W. Jeong and K. Roy -- Reducing pipeline energy demands with local DVS and dynamic retiming / S. Lee, S. Das, T. Pham, T. Austin, D. Blaauw and T. Mudge -- Understanding nanoscale conductors / S. Datta -- Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization / K. Hazelwood and D. Brooks -- Mitigating inductive noise in SMT processors / W. El-Essawy and D. H. Albonesi -- Energy-aware demand paging on NAND flash-based embedded storages / C. Park, J.-U. Kang, S.-Y. Park and J.-S. Kim -- Application adaptive energy efficient clustered architectures / D. Marculescu -- The impact of variability on power / S. Nassif --
  • Reducing radio energy consumption of key management protocols for wireless sensor networks / B.-C. C. Lai, D. D. Hwang, S. P. Kim and I. Verbauwhede -- Evaluating and optimizing power consumption of anti-collision protocols for applications in RFID systems / F. Zhou, C. Chen, D. Jin, C. Huang and H. Min -- Experience with a low power wireless mobile computing platform / V. Raghunathan, T. Pering, R. Want, A. Nguyen and P. Jensen -- FSM-based power modeling of wireless protocols : the case of Bluetooth / L. Negri, M. Sami, D. Macii and A. Terranegra -- Efficient adaptive voltage scaling system through on-chip critical sPath emulation / M. Elgebaly and M. Sachdev -- An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes / B. Gorjiara, N. Bagherzadeh and P. Chou -- Memory-aware energy-optimal frequency assignment or dynamic supply voltage scaling / Y. Cho and N. Chang -- Preemption-aware dynamic voltage scaling in hard real-time systems / W. Kim, J. Kim and S. L. Min.
ISBN
1581139292
OCLC
  • ocm56472231
  • SCSB-5160082
Owning Institutions
Columbia University Libraries