Research Catalog

Logic-timing simulation and the degradation delay model

Title
Logic-timing simulation and the degradation delay model / Manuel J. Bellido, Jorge Juan, Manuel Valencia.
Author
Bellido, Manuel J., 1964-
Publication
London : Imperial College Press, [2006], ©2006.

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StatusFormatAccessCall NumberItem Location
TextRequest in advance QA76.9.C65 B4555 2006gOff-site

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Details

Additional Authors
  • Juan Chico, Jorge.
  • Valencia, Manuel.
Description
xvii, 267 pages : illustrations; 24 cm
Subjects
Bibliography (note)
  • Includes bibliographical references and index.
ISBN
1860945899
OCLC
  • ocm64739465
  • SCSB-5239432
Owning Institutions
Columbia University Libraries