Research Catalog

Title

Low-power high-level synthesis for nanoscale CMOS circuits / Saraju P. Mohanty [and others].

Publication

New York : Springer, [2008], ©2008.

Items in the Library & Off-site

Holdings

Details

Additional Authors

Mohanty, Saraju P.

Description

xxxii, 302 pages : illustrations; 25 cm

Summary

"Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence of process variations of nano-CMOS technologies. The authors show very large-scale integration (VLSI) researchers and engineers how to minimize the different types of power consumption of digital circuits. The material deals primarily with high-level (architectural or behavioral) energy dissipation because the behavioral level is not as highly abstracted as the system level nor is it as complex as the gate/transistor level. At the behavioral level there is a balanced degree of freedom to explore power reduction mechanisms, the power reduction opportunities are greater, and it can cost-effectively help in investigating lower power design alternatives prior to actual circuit layout or silicon implementation." "The book is a self-contained low-power, high-level synthesis text for Nanoscale VLSI design engineers and researchers. Each chapter has simple relevant examples for a better grasp of the principles presented. Several algorithms are given to provide a better understanding of the underlying concepts. The initial chapters deal with the basics of high-level synthesis, power dissipation mechanisms, and power estimation. In subsequent parts of the text, a detailed discussion of methodologies for the reduction of different types of power is presented."--BOOK JACKET.

Subject

• Low voltage integrated circuits > Design and construction
• Integrated circuits > Design and construction
• Metal oxide semiconductors, Complementary > Design and construction
• Nanoelectronics > Design and construction

Bibliography (note)

• Includes bibliographical references (p. 281-298) and index.

Contents

1. Introduction -- 2. High-Level Synthesis Fundamentals -- 3. Power Modeling and Estimation at Transistor and Logic Gate Levels -- 4. Architectural Power Modeling and Estimation -- 5. Power Reduction Fundamentals -- 6. Energy or Average Power Reduction -- 7. Peak Power Reduction -- 8. Transient Power Reduction -- 9. Leakage Power Reduction -- 10. Conclusions and Future Directions.

ISBN

• 9780387764733
• 0387764739

OCLC

• 209335825
• ocn209335825
• SCSB-5425513

Owning Institutions

Columbia University Libraries