Research Catalog

Reduced instruction set computer architectures for VLSI

Title
Reduced instruction set computer architectures for VLSI / Manolis G.H. Katevenis.
Author
Katevenis, Manolis G. H.
Publication
  • Cambridge, Mass. : MIT Press, [1985]
  • ©1985

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Book/TextUse in library QA76.9.A73 K37 1985Off-site

Details

Description
215 pages : illustrations; 24 cm
Series Statement
ACM doctoral dissertation awards ; 1984
Uniform Title
ACM doctoral dissertation award ; 1984.
Subject
  • Computer architecture
  • Integrated circuits > Very large scale integration
  • Computer architecture
  • Integrated circuits > Very large scale integration
  • VLSI
  • Computerarchitektur
  • Circuitos integrados
  • Arquitetura de computadores
Genre/Form
  • dissertations.
  • Academic theses
  • Hochschulschrift.
  • Academic theses.
  • Thèses et écrits académiques.
Note
  • Originally presented as author's thesis (Ph. D.)--University of California, Berkeley, 1983.
  • Includes index.
Bibliography (note)
  • Bibliography: p. [201]-207.
Contents
The Nature of General-Purpose Computations -- The RISC I & II Architecture and Pipeline -- The RISC II Design and Layout -- Debugging and Testing RISC II -- Additional Hardware Support for General-Purpose Computations -- Appendix A: Detailed Description of the RISC II Architecture.
ISBN
  • 0262111039
  • 9780262111034
LCCN
85000078
OCLC
  • ocm11650165
  • 11650165
  • SCSB-617609
Owning Institutions
Princeton University Library